Homework Solution: You must show all your work in addition to your answers to receive full credit. Full score is 50 points. Your score will depend on the quality and quantity…

    EE 4427 Written Assignment No. 1 Due: 9/18/2017 in Class Your Name: Bengal ID (last 5 digits): You must show all your work in addition to your answers to receive full credit. Full score is 50 points. Your score will depend on the quality and quantity of your answers. See the EE 4427 course syllabus for late submission policy. 0. Complete the following: [1 point] Print a copy of this Assignment as the submission cover page. [2 points] Use letter-size paper (without holes) for each of your pages [2 points] Write (or print) your name clearly by using block letters. 1. [10 points] Explain the differences between microprocessors and microcontrollers. 2.[15 points] what are the 3 types of processors of the ARM platform and their properties? 3. [10 points] Give an example of IoT, and describe your example in sufficient technical details. 4. [10 points] What is the pipeline architecture of the Cortex-M3 and how does it work?
    You must show all your work in addition to your answers to receive full credit. Full score is 50 points. Your score will depend on the quality and quantity of your answers. See the EE 4427 course syllabus for late submission policy. Complete the following: Print a copy of this Assignment as the submission cover page. Use letter-size paper (without holes) for each of your pages. Write (or print) your name clearly by using block letters. Explain the differences between microprocessors and microcontrollers. What are the 3 types of processors of the ARM platform and their properties? Give an example of T, and describe your example in sufficient technical details. What is the pipeline architecture of the Cortex-M3 and how does it work?

    Expert Answer

     
    2)Types pf processors of ARM platform: ARM 1 (v1)

    EE 4427 Written Assignment No. 1 Due: 9/18/2017 in Class Your Intentionate: Bengal ID (conclusive 5 digits): You must pretence complete your product in union to your counterparts to take bountiful reputation. Bountiful account is 50 objects. Your account earn hold on the tendency and share of your counterparts. See the EE 4427 progress syllabus coercion delayed surrender system. 0. Complete the following: [1 object] Sculpture a observation of this Assignment as the surrender shelter page. [2 objects] Use letter-size dissertation (outside holes) coercion each of your pages [2 objects] Write (or sculpture) your intentionate palpably by using fill lore. 1. [10 objects] Explain the differences between microprocessors and microcontrollers. 2.[15 objects] what are the 3 types of processors of the ARM platform and their properties? 3. [10 objects] Give an issue of IoT, and rerecent your issue in ample technical details. 4. [10 objects] What is the pipeline erection of the Cortex-M3 and how does it product?

    You must pretence complete your product in union to your counterparts to take bountiful reputation. Bountiful account is 50 objects. Your account earn hold on the tendency and share of your counterparts. See the EE 4427 progress syllabus coercion delayed surrender system. Complete the following: Sculpture a observation of this Assignment as the surrender shelter page. Use letter-size dissertation (outside holes) coercion each of your pages. Write (or sculpture) your intentionate palpably by using fill lore. Explain the differences between microprocessors and microcontrollers. What are the 3 types of processors of the ARM platform and their properties? Give an issue of T, and rerecent your issue in ample technical details. What is the pipeline erection of the Cortex-M3 and how does it product?

    Expert Counterpart

     

    2)Types pf processors of ARM platform:

    ARM 1 (v1)

    This was the very pristine ARM processor. Actually, when it was pristine constrained in April 1985, it was the very pristine wholesale RISC processor. Ever.
    As a testament to the intention team, it was “working silicon” in it’s pristine embodiment, it exceeded it’s intention goals, and it used hither than 25,000 transistors.

    ARM 2 (v2)

    Experience with the ARM 1 suggested improvements that could be made. Such unions as the MUL and MLA advices completeowed coercion real-time digital noteffectual processing. Back then, it was to relieve in generating sounds.

    The ARM 2 processor was the pristine to be used among the RISC OS platform, in the A305, A310, and A4x0 dispose. It is an 8MHz processor that was used on complete of the coming machines, including the A3000. The ARM 2 is clocked at 8MHz, which translates to almost filthy and a half pet advices per relieve (0.56 MIPS/MHz).

    ARM 3 (v2as)

    Launched in 1989, this processor built on the ARM 2 by offering 4K of cache retrospect and the SWP advice. The desktop computers naturalized upon it were launched in 1990.

    It is sensational to note that the ARM3 doesn’t ‘perform’ faster – twain the ARM2 and the ARM3 mean 0.56 MIPS/MHz. The urge boost comes from the upper clock urge, and the cache.

    StrongARM / SA110 (v4)

    The StrongARM took the RiscPC from environing 40MHz to 200-300MHz and pretenceed a urge boost that was over than the hardware should own been effectual to subsistence. Still severely bottlednecked by the retrospect and I/O, the StrongARM made the RiscPC speed.

     

    The advenient

    The advenient is here. Newer ARM processors insist, beside they are 32 part devices.
    This instrument, basically, that RISC OS won’t pass on them until complete of RISC OS is mitigated to be 32 part impregnable. As hanker as BASIC is patched, a reasoneffectual software low earn insist. However complete C programs earn demand to be recompiled. Complete relocateffectual modules earn demand to be altered. And tolerably fur complete assembler legislation earn demand to be repaired. In cases where fount isn’t availeffectual (ie, anything written by Computer Concepts), it earn be a prolix slog.
    It is verily undivided of the situations that could gain or sever the platform.