# Homework Solution: Question (b): NAND & NOR gates (20 pts) Figure 3 shows the ANSI diagrams for a pair of Boolean gates known as NAND (…

Question (b): NAND & NOR gates (20 pts) Figure 3 shows the ANSI diagrams for a pair of Boolean gates known as NAND ("not AND") and NOR ("not OR") Those correspond to the intuitive "logical NAND" and "logical NOR" binary operators which are respectively denoted by the Sheffer stroke: ↑1 and the Perce or Quine arrow: The truth tables for those operations are given in table 2. We already used a NOR gate in this homework: It was used to compute the function of the circuit in Figure 2! (a) A NAND gate (b) A NOR gate Figure 3: ANSI symbols for the NAND and NOR Boolean gates FTT Table 2: The truth table for the NAND (1) and NOR () logical operators. For reasons that are beyond the scope of our course, NAND and NOR gates are cheaper to implement than AND and OR gates in modern hardware. It would therefore be beneficial to us, in terms of cost, if we could design combinational circuits which make use of those gates Can we translate every combinational Boolean circuit into one that uses such gates erclusively? If you believe the answer is Yes, tell us why (i.e prove to us that the statement is correct). If you believe that the answer is No, give us at least one circuit where this is not possible (i.e a counter-erample)